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| Preface | p. iii |
| Conference organization | p. v |
| Ultra-Shallow Junctions for Nanoscale CMOS | p. 1 |
| High Ramp Rate Rapid Thermal Annealing for Ultra-Shallow Junctions | p. 3 |
| New Physics for Modeling Transient Enhanced Diffusion in RTP | p. 15 |
| Optical Effects in Diffusion and Activation Processes During RTA | p. 21 |
| Spike Annealing for Ultra-Shallow Junction Formation | p. 33 |
| Inherent Radiative Differences between Rapid Thermal and Furnace Annealing: Their Effects on Dopant Diffusion and Activation | p. 41 |
| Ultra-Shallow Junction Formation Using Ion Implantation and Rapid Thermal Annealing: Physical and Practical Limits | p. 49 |
| Role of Silicon and Boron Interstitial Clusters in Transient Enhanced Diffusion | p. 61 |
| Ultra-Shallow P[superscript +]-N Junctions for 35-70 nm CMOS using Selectively Deposited Very Heavily Boron-doped Silicon-Germanium Films | p. 73 |
| Selective Epitaxial Si and SiGe for Elevated Source Drain MOSFETs | p. 83 |
| Laser Thermal Processing (LTP) for Fabrication of Ultra-Shallow, Hyper-Abrupt, Highly Activated Junctions for Deca-Nanometer MOS Transistors | p. 95 |
| Athermal Annealing of Silicon Implanted with Phosphorus and Arsenic | p. 107 |
| Exploring Alternative Annealing Methods for Shallow Junction Formation in Ion Implanted Silicon | p. 119 |
| Shallow Junction Challenges to Rapid Thermal Processing | p. 129 |
| Contacts for Nanoscale CMOS | p. 137 |
| Aspects of Enhanced Titanium Salicide Formation | p. 139 |
| Multi-Substrate CoSi[subscript 2] Formation Kinetics in a Low-Pressure, Susceptor-Based RTP Tool | p. 151 |
| Metal / Silicon Schottky Barrier Lowering by RTCVD Interface Passivation | p. 161 |
| Gate Stacks for Nanoscale CMOS | p. 167 |
| Ultrathin CVD Gate Dielectrics for 130 nm Technology Node | p. 169 |
| High Performance, Highly Reliable Gate Oxide Formed with Rapid Thermal Oxidation In-Situ Steam Generation (ISSG) Technique | p. 179 |
| High Reliable In Situ Steam Generation Process for 1.5-2.5 nm Gate Oxides | p. 187 |
| Investigation of In-Situ Steam Generated Oxide (ISSG) followed by Remote Plasma Nitridation (RPN) for Effective Oxide Thickness Decrease and Gate Leakage Reduction | p. 195 |
| Rapid Thermal Processing Using Steam | p. 203 |
| Corona-Charge Evaluation of Thermal SiO[subscript 2] Growth by Single-Wafer and Batch Methods | p. 215 |
| Growth of Ultrathin Nitride on Si(100) by Rapid Thermal N[subscript 2] Treatment | p. 223 |
| Gate Dielectrics Formed by Remote Plasma Nitridation of Ultrathin In-Situ Steam Generated (ISSG) Oxides | p. 231 |
| In-situ Rapid Thermal N[subscript 2]O Oxidation of NH[subscript 3]-Nitrided Si for Ultrathin Nitride/Oxide Stack Gate Formation | p. 239 |
| Processing and Characterization of RTCVD Silicon Nitride and Oxynitride Grown in a Single-Wafer RT Cluster Tool | p. 247 |
| Integrated Rapid Thermal CVD Oxynitride Gate Dielectric for Advanced CMOS Technology | p. 255 |
| Ultrathin (EOT [ 7 A) Ta[subscript 2]O[subscript 5] Gate Stacks Prepared by an In-Situ RT-MOCVD Process | p. 263 |
| High-k Oxides by Atomic Layer Chemical Vapour Deposition | p. 271 |
| Electrical and Chemical Properties of Ultrathin RT-MOCVD Grown Ti-Doped Ta[subscript 2]O[subscript 5] | p. 283 |
| Electrical and Material Properties of Metal Silicate Dielectrics and Metal Gates for Advanced CMOS Devices | p. 291 |
| RTCVD Polysilicon Grain Dimension Control | p. 299 |
| New Applications of RTP | p. 307 |
| Mechanisms and Applications of the Control of Dopant Profiles in Silicon Using Si[subscript 1-x-y] Ge[subscript x]C[subscript y] Layers Grown by RTCVD | p. 309 |
| High Performance Buried Silicon-Germanium Channel PMOST Fabricated Using Rapid Thermal Processing and Shallow Trench Isolation | p. 321 |
| Kinetic Study of In-Situ Copper Oxidation and Reduction Using Rapid Thermal Processing and Its Applications in ULSI | p. 329 |
| Development of an RTA Process for the Enhanced Crystallization of Amorphous Silicon Thin Films | p. 337 |
| Advances in RTP Systems and Process Monitoring | p. 345 |
| Optimization of Support Temperature in RTA-Tools by Scanning Infrared Depolarization Imaging of Monitor Wafers | p. 347 |
| Wafer Temperature Characterization During Low-Temperature Annealing | p. 355 |
| Determining the Uncertainty of Wafer Temperature Measurements Induced by Variations in the Optical Properties of Common Semiconductor Materials | p. 363 |
| Low-Temperature Measurements and Monitors for Rapid Thermal Processing | p. 375 |
| In Situ Selectivity and Thickness Monitoring based on Quadrupole Mass Spectroscopy during Selective Silicon Epitaxy | p. 383 |
| Optimization and Control of Gas Flows in an RTCVD Reactor | p. 393 |
| LEVITOR 4000: An Advanced RTP System Based on Conductive Heat Transfer | p. 401 |
| Ultra-Shallow Junction Formation of BF[subscript 2 superscript +] Implants Using a Low-Pressure, Hot-Wall Rapid Thermal Anneal | p. 413 |
| Temperature Gradient Rapid Thermal Processor | p. 421 |
| Spike Thermal Processing Using Arc-Lamps | p. 429 |
| Novel High Ramp-Down Rate and Reflector Design in Rapid Thermal Processing | p. 437 |
| Improved Performance of a Fast-Ramp RTA System through Recipe and Controller Optimization | p. 445 |
| Author Index and Key Word Index | p. 453 |
| Author Index | p. 455 |
| Key Word Index | p. 459 |
| Table of Contents provided by Syndetics. All Rights Reserved. |
Rapid Thermal and Other Short-Time Processing Technologies : Proceedings of the International Symposium
by International Symposium on Rapid Thermal and Other Short-Time Processing Technologies (1st : 2000 : Toronto, Ont.); Roozeboom, Fred; Electrochemical Society Electronics Division; Electrochemical Society. Dielectric Science and Technology DivisionFormat: Hardcover
Pub. Date: 2000-11-01
Publisher(s): Electrochemical Society
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